Requirements: English
Company: IC Resources
Region: Pisa , Tuscany
I am recruiting for a Senior Analog IC Design Engineeron behalf of my client, a growing technology company developingnext-generation solutions for high-performance data communication.The position is focused on high-speed Phase Locked Loop design andintegrated power management within advanced CMOS nodes. The SeniorAnalog IC Design Engineer will contribute to cutting-edgedevelopments in energy-efficient interconnects. Keyresponsibilities: - Design and develop high-speed PLLs (10 GHz andabove) - Implement on-chip power management circuits such as LDOsand DACs - Collaborate closely with digital, systems and photonicteams on complex mixed signal integration - Run simulations,oversee layout and verify performance of analog building blocks -Bring industry trends and design innovations into the developmentcycle Required experience: - Proven track record in PLL and powermanagement design, ideally at or near 12nm nodes - Strongbackground in CMOS analog design fundamentals - Proficient withtools like Cadence and Spectre - Detail oriented with excellentproblem solving skills To be considered for this opportunity, youwill need to have experience in high-speed designs. This is anexcellent opportunity for a Senior Analog IC Design Engineerlooking to work on novel technologies in a collaborative andforward-looking environment. Remote working may be possible for theright candidate, although Italy is preferred.