Requirements: English
Company: IC Resources
Region: kingdom of spain, es ,
Senior DFT Engineer RISC-V SoC Project | Location: Barcelona, SpainJoin a cutting-edge RISC-V semiconductor company developing SoCs for accelerated computing. Based in Barcelona, this opportunity places you at the forefront of high-performance silicon design, working on innovative RISC-V architectures. The team is looking for a Senior DFT Engineer to play a key role in shaping the test strategy and delivery of their next-generation SoCs.Key Responsibilities:Define and implement robust DFT architectures for advanced SoC designs.Drive DFT integration including scan, ATPG, MBIST, and boundary scan (JTAG).Develop and validate test patterns to ensure high coverage and production readiness.Collaborate with RTL and verification teams to ensure seamless DFT integration.Contribute to overall silicon bring-up and test strategy planning.Essential Skills Experience:Proven track record of DFT design and implementation across multiple successful ASIC projects.Strong knowledge of industry-standard DFT methodologies, including:ATPGJTAGMBISTHands-on experience with test pattern development and post-silicon validation workflows.Familiarity with RTL design and verification flows is advantageous.Experience with RISC-V architecture or SoC development is a strong plus.Why Apply?Be part of a fast-growing team pioneering open instruction set computing.Work on high-impact silicon that powers the future of accelerated computing.Join an international engineering environment in the vibrant city of Barcelona.Competitive compensation, growth opportunities, and a collaborative culture.Interested in helping build the future of compute? Apply today and be a key contributor in a transformative RISC-V journey.For more information, please contact Rachel Mason at IC Resources.